The C++/SYCL machx-inference-engine, which runs local LLM inference on Intel Arc cards, released v0.2.35 in a GitHub commit on November 2, 2026. The key point is that Flash-Next's layer splitting changed from a fixed pair of two cards to an N-stage chain with --gpus N. In the same commit, the reading error for community GGUF files was also fixed.
Previously --gpus was limited to 2. Now stage s handles the layer interval [s·48/N, (s+1)·48/N) of card s, and the forward pass, pipeline prefill, the verification round of the MTP draft head (for speculative decoding), prompt lookup, prompt cache, restart point, request lane, and image staging all go through the same chain stage. A user who was trying to build a 4-card Arc Pro B70 server reported a problem where only some paths of the intermediate stages were connected, so only 24 of the 48 layers ran; this change fixes the structure so that a stage cannot be skipped.
Verification was done not with real 4 cards but with the IE_Q4E_LOGICAL_CARDS test switch, which splits one card into multiple stages to run 4 stages on 2 cards. At that time the greedy response was byte-identical to the 2-stage server, and the ie-qwen4exp-run2 gate tool compared the logits of the N-stage chain bit-for-bit against the 1-card baseline, with 4 stages and 3 stages passing. The IE_Q4E_RUN2_SKIP_STAGE self-check itself does not pass if a single stage is missed. Separately, the engine controller writes per_layer_token_embd.weight as IQ4_NL (90 bytes per row), but community files such as Unsloth Q8_0 and UD-Q6_K_XL store them as Q8_0 (170 bytes per row). Since the gatherer read only one format, the file loaded but produced garbage answers; now it reads per dtype and rejects other formats by name. The P2P sharing context also keeps all cards and enables bidirectional peer access for each card pair.
However, real 4-card hardware could not be obtained. The 4-card numbers are now left with the user's first measurement, and verification relies on the logical partitioning of 2 cards. IE_P2P=1, which is direct card-to-card transfer, was left as a 2-stage feature because measurements on B70 showed that going through the host is faster. The pinned memory path for expert uploads, when enabled, slows decoding by 14–23% and delays the first token by 47%, so it is off by default. Routing experts from community files still load an F16 copy (1.88 times the file size) into host memory at load time. If you plan to run Flash-Next split across multiple Arc cards, v0.2.35 is a stage worth trying, but the real 4-card numbers and expert streaming support are up to the next version.