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precisit/apple-matrix-capabilities — Apple Silicon matrix capability map

precisit/apple-matrix-capabilities is a dataset that organizes, with its supporting evidence, the operand formats, measured speed, and constraints of low-bit matrix operations across Apple Silicon generations.

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precisit/apple-matrix-capabilities is a dataset that organizes, with its supporting evidence, the operand formats, measured speed, and constraints of low-bit matrix operations across Apple Silicon generations.

GitHub description: Per-generation Apple Silicon matrix-unit capability map: operand formats, measured lane rates, availability constraints, and runnable probes. Evidence first.

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precisit/apple-matrix-capabilities is a dataset that collects the operand formats, measured speed, and usage constraints that the GPU matrix units of each Apple Silicon generation support in low-bit matrix operations. It is not a new release but a description of the repository itself. It is written in Python and published under the MIT license.

Apple does not publish the operand formats or the per-generation throughput of its matrix units. This repository gathers that information by attaching a receipt, the source evidence, to every measurement. It also includes a runnable probe and a validator that checks the measurement evidence. matrix/MATRIX.md and matrix/capabilities.csv are generated from matrix/capabilities.json, and chips that have not been measured are marked as unknown. So it does more than list values: it also separates the source of each measurement from the range that remains unconfirmed.

Still, according to the README, the only chips actually measured in October 2026 are M5 Air, M5 Pro, M5 Max, and M6, and the rest are unmeasured. The results are values produced by a lane probe, not model performance metrics. So this map can be read as a reference for the supported formats and constraints of low-bit computation, but there is not enough basis to read it as a performance comparison across all of Apple Silicon.