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mattral/flashspec-asm — AVX2 CPU kernel for speculative decoding

mattral/flashspec-asm is an optional AVX2 CPU path for computing the residual probability distribution in speculative decoding.

Repositorymattral/flashspec-asm ↗

mattral/flashspec-asm is an optional AVX2 CPU path for computing the residual probability distribution in speculative decoding.

GitHub description: Hand-written x86-64 AVX2 assembly kernel for the residual distribution computation in speculative decoding

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★ 9
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Language
C
License
Apache-2.0
Latest release
v0.1.2
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mattral/flashspec-asm is a repository that provides x86-64 AVX2 assembly kernels for computing the residual probability distribution in speculative decoding. It separates the hand-written kernel as an optional CPU acceleration path, and the latest release is v0.1.2. FACTS does not separately list the specific items changed in this release, so changes beyond the version number cannot be identified. The repository's primary language is C and its license is Apache-2.0.

The role of this implementation is not to replace speculative decoding as a whole, but to provide an option to handle the residual distribution computation on the CPU. According to the repository description, it targets the CPU path unlike the GPU-oriented Triton kernel, and handles vector summation and normalization in AVX2 assembly. The kernel is wired to a C ABI binding layer and Python bindings so it can be applied optionally. It therefore should not be read as an implementation that changes the graphics processing unit path or the control features of the main engine.

The repository includes correctness and packaging tests and benchmark material that compares against a C reference implementation. However, the performance figures are not independently reproducible from the repository's benchmark records alone, so actual speed improvements in real environments cannot be concluded from this material alone. What can be confirmed is that this is an implementation that separates a specific computation into an AVX2-based CPU path and wires it up; performance judgment still requires separate verification.