fesens/opentpu is a repository for an open-source AI accelerator designed by an AI agent. There is no latest release; it is written in Verilog and follows the Apache-2.0 license. Hardware RTL, the instruction set (ISA), a bit-accurate simulator, a kernel language compiler, and host software are all gathered in one place. It does not release only certain parts; it is a project where you can look at the full flow of the hardware and software that makes up and operates the accelerator.
The repository states that Qwen3, LFM2.5, and Qwen3.5 can be run on a Kintex-7 PCIe card, and that results on an actual card match the simulator token for token. The README presents a peak bandwidth of 17.1 GB/s based on DDR3-1066, along with the bandwidth during decoding, and notes that the measurement method is greedy decoding that generates 64 tokens after a 512-token prompt. Its distinguishing point is that the RTL, simulator, compiler, and board test are released together, so you can examine how they fit together.
That said, the throughput and bandwidth figures are measurements the author presents themselves. No independent verification, raw logs, or reproduction scripts have been confirmed, so it is hard to accept the performance numbers as settled results. The repository is therefore concrete as material for studying an accelerator implementation and its verification structure, but the evidence is limited for judging real performance from the published numbers alone.